Testcase Descriptions¶
Testcase 01: test_top_fpga_registers¶
Description¶
Checks default values and access rights (RO/RW) for the test registers of the FPGA.
Steps¶
-
Reset the DUT
- Call
proc_reset_dut - Wait for 100 µs
- Call
-
Check Default Register Values
- For each register:
Call
proc_uart_check_default_valueand verify value after reset. -
Verify Read-Only Registers
- For each read-only register (same as above except for
C_REG_16_BITS): - Call
proc_uart_check_read_only.
- For each read-only register (same as above except for
-
Verify Read-Write Registers
- Check
C_REG_16_BITS:- Write
not C_REG_16_BITS.datawithproc_uart_write. - Read back and verify value with
proc_uart_check.
- Write
- Check
-
Write and Verify Custom Value
- Write
0xABCDtoC_REG_16_BITS. - Read back and check value is
0xABCD.
- Write
Testcase 02: test_uart_robustness¶
Description¶
Tests robustness of UART implementation including invalid start/stop bits and command framing.
Steps¶
-
Reset the DUT
- Call
proc_reset_dut - Wait for 100 µs
- Call
-
Send Read Command With Invalid Start Bit in 'R'
- Set manual UART:
tb_i_uart_selectto1 - Manipulate
tb_i_uart_rx_manualas follows:- Set to
0, wait 0.25 ×C_UART_BIT_TIME(invalid start bit) - Set to
1, wait 0.75 ×C_UART_BIT_TIME - Set to
0, waitC_UART_BIT_TIME(bit 0) - Set to
1, waitC_UART_BIT_TIME(bit 1) - Set to
0, waitC_UART_BIT_TIME(bit 2) - Set to
0, waitC_UART_BIT_TIME(bit 3) - Set to
1, waitC_UART_BIT_TIME(bit 4) - Set to
0, waitC_UART_BIT_TIME(bit 5) - Set to
1, waitC_UART_BIT_TIME(bit 6) - Set to
0, waitC_UART_BIT_TIME(bit 7) - Send stop bit (
1), 1.1 × waitC_UART_BIT_TIME
- Set to
- Send bytes
0x30,0x30,0x0Dusingproc_uart_send_byte - Wait 1.1 ×
C_UART_READ_CMD_TIME - Check UART TX is stable high:
tb_pad_o_uart_txremains1forC_UART_READ_CMD_TIMEwithcheck_equal
- Set manual UART:
-
Send Read Command With Invalid Stop Bit in 'R'
- Call
proc_reset_dut - Wait for 100 µs
- Set
tb_i_uart_selectto1 - Manipulate
tb_i_uart_rx_manualas follows:- Send start bit (
0), waitC_UART_BIT_TIME - Set to
0, waitC_UART_BIT_TIME(bit 0) - Set to
1, waitC_UART_BIT_TIME(bit 1) - Set to
0, waitC_UART_BIT_TIME(bit 2) - Set to
0, waitC_UART_BIT_TIME(bit 3) - Set to
1, waitC_UART_BIT_TIME(bit 4) - Set to
0, waitC_UART_BIT_TIME(bit 5) - Set to
1, waitC_UART_BIT_TIME(bit 6) - Set to
0, waitC_UART_BIT_TIME(bit 7) - Send invalid stop bit (
0), 1.1 × waitC_UART_BIT_TIME
- Send start bit (
- Send bytes
0x30,0x30,0x0Dusingproc_uart_send_byte - Wait 1.1 ×
C_UART_READ_CMD_TIME - Check UART TX is stable high:
tb_pad_o_uart_txremains1forC_UART_READ_CMD_TIMEwithcheck_equal
- Call
-
Check UART Timings With Value
0x5555- Call
proc_reset_dut - Wait for 100 µs
- Set
tb_check_uart_timingsto1 - Write
0x5555toC_REG_16_BITSwithproc_uart_write - Read back using
proc_uart_readto start the timing check - Wait for
C_UART_READ_CMD_TIME
- Call
-
Send Read Commands With Invalid CR
- Call
proc_reset_dut - Wait for 100 µs
- Send bytes:
0x52,0x30,0x31,0x0A(missing CR) - Wait
C_UART_READ_CMD_TIME - Check TX remains
1for duration
- Call
-
Send Write Command With Invalid CR
- Call
proc_reset_dut - Wait for 100 µs
- Check default value for
C_REG_16_BITS - Send bytes:
0x57,0x46,0x46,0x39,0x40,0x41,0x42,0x0Ausingproc_uart_send_byte - Wait
C_UART_READ_CMD_TIME - Check value in
C_REG_16_BITSwas not written; contents unchanged withproc_uart_check
- Call
Testcase 03: test_led_and_switches_toggling¶
Description¶
Validates REG_LED (read-write) and REG_SWITCHES (read-only). Checks toggling the LED output and reading all switch combinations.
Steps¶
-
Check Register
REG_LEDCharacteristics- Call
proc_reset_dut - Wait for 100 µs
- Check default value using
proc_uart_check_default_valueforC_REG_LED - Check register
C_REG_LEDis in read-write mode by writingnot C_REG_LED.dataand that written value equals to15b"0" & not C_REG_LED.data(0)usingproc_uart_check_read_write
- Call
-
Toggle
led_0Register and Verify Output -
Check Register
REG_SWITCHESCharacteristics- Call
proc_reset_dut - Wait for 100 µs
- Check default value using
proc_uart_check_default_valueforC_REG_SWITCHES - Check register
C_REG_SWITCHESis in read-only mode usingproc_uart_check_read_only
- Call
-
Toggle Input Switches and Verify Combinations
- For all combinations of
tb_pad_i_switch_0,tb_pad_i_switch_1,tb_pad_i_switch_2(from0to7):- Set switches with binary pattern from
i - Wait for 1 ns (signal propagation)
- Check register
C_REG_SWITCHESvalue matches the bit pattern usingproc_uart_check
- Set switches with binary pattern from
- For all combinations of
Testcase 04: test_spi¶
Description¶
Tests SPI master TX and RX registers, including SPI transfer correctness and MOSI/MISO data verification.
Steps¶
-
Reset DUT and Check Register Default Values
- Call
proc_reset_dut - Wait for 100 µs
- Check default value of
C_REG_SPI_TXusingproc_uart_check_default_value - Check default value of
C_REG_SPI_RXusingproc_uart_check_default_value - Check register
C_REG_SPI_RXis in read-only mode usingproc_uart_check_read_only - Check register
C_REG_SPI_TXis in read-write mode by writingnot C_REG_SPI_TX.dataand that written value equals to0x01FFusingproc_uart_check_read_write - Pop data from SPI model and check it is equals to
not C_REG_SPI_TX.data[7:0]withcheck_equal
- Call
-
Testing SPI output
- Call
proc_reset_dut - Wait for 100 µs
- Send an SPI transaction with data set to
0x55usingproc_spi_check - Send an SPI transaction with data set to
0xABusingproc_spi_check - Send an SPI transaction with data set to
0x1Eusingproc_spi_check
- Call
-
Testing SPI timings
- Call
proc_reset_dut - Wait for 100 µs
- Set
tb_check_spi_timingsto 1 - Wait for 2 ×
C_CLK_PERIOD - Set
tb_check_spi_timingsto 0 - Send an SPI transaction with data set to
0x55usingproc_spi_write - Wait for 2 ×
C_SPI_TRANSACTION_TIME(time longer than the response) - Set
tb_check_spi_timingsto 1 - Wait for 2 ×
C_CLK_PERIOD - Set
tb_check_spi_timingsto 0 - Send an SPI transaction with data set to
0xABusingproc_spi_write - Wait for 2 ×
C_SPI_TRANSACTION_TIME(time longer than the response)
- Call