Entity: xor_end

Diagram

t_state_array i_state [127:0] i_key i_enable_xor_key i_enable_xor_lsb t_state_array o_state

Ports

Port name Direction Type Description
i_state input t_state_array Input State Array
i_key input [127:0] Input Key to XOR
i_enable_xor_key input Enable XOR with Key, active high
i_enable_xor_lsb input Enable XOR with LSB, active high
o_state output t_state_array Output State Array

Signals

Name Type Description
state_part_4_xored_with_lsb logic [63:0] Signal to store the 4th part of the state xor-ed with the LSB